This article describes the characteristics of the FPGA+CPU monolithic integration.
Some of the potential benefits of FPGA-based CPU integration include: easier to meet the functional requirements of most systems; potentially improving system performance; flexibility and scalability in some applications; Interfaces to peripherals can be optimized; interface performance of hardware and software interconnects is greatly improved; design reuse and rapid prototyping of new designs are facilitated; PCB layout of single or even full boards is simplified.
The advantages of single-chip integration of FPGA+CPU compared to traditional applications can be seen, but from another perspective, just as the CPU evolves from single-core to multi-core, it continues the "magic" of Moore's Law, the strength of FPGA+CPU. Attacking is more like parallel processing in embedded applications.
Continuing the style, Xilinx and Altera have chosen the ARM Cortex-A9 core with excellent performance on their embedded CPU devices. It shows that the market they are targeting is tending to mid- to high-end applications. In the low-end applications, even in the era of network explosion, the unknown Capital-Micro company is still not well-known to the engineers, but the reconfigurable system chip CsoC (Configurable SoC) developed by them is quietly low in the middle and low. The end market application has killed a bloody road. It is worth mentioning that this is a local Chinese FPGA manufacturer.
It’s been 40 years since Intel’s first 4-bit processor came out in 1971. Although the embedded industry has undergone tremendous changes, even if you think it’s a “soul”, it’s a simple and practical 8-bit MCS. -51 single-chip microcomputer is still unique, especially in the domestic industrial control industry still has a strong vitality.
Since its establishment in 2005, Capital-Micro has launched two generations of Astro and AstroII CSoC. Its embedded 8051 can run stably to 100MHz and 150MHz on two generations of devices. Although the FPGA manufacturing process is still at 0.13um, which greatly restricts the logic performance, the current two generations of products can at least meet industrial applications including stepper motor control, LCD drive control, interface expansion, LED control card, and micro printer demand.
From the internal architecture of the device, as shown in Figure 2, AstroII not only has 8051 hard cores in the same product, but also integrates some common peripherals such as timers, watchdogs, UARTs. IIC and SPI, etc. Of course, the 8051 program startup also adopts a lot of ARM's Fully Shadowed mode to ensure that the slow read and write ROM is no longer a bottleneck restricting CPU performance. The interconnection between 8051 and FPGA can not only use 8051 EMIF addressing (23-bit wide addressable address bus), 4K × 8bit DPRAM is also a good choice for high-speed data transmission, and has been solidified on these interconnect interfaces. Synchronization logic eliminates the need for designers to waste energy. In addition, from the cheapest crystal clock support, to the maximum number of I / O, to its approachable price, all show us the "economical" of this domestic chip.
If you want to know more, our website has product specifications for the FPGA+CPU monolithic integration, you can go to HongDa ELECTRONICS to get more information