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1. Description
Microchip Technology Inc. 25AA256/25LC256 are 256 Kbit serial electrically erasable prom. Access memory via simple serial Peripheral Interface (SPI) compatible serial bus. This one The required bus signal is the clock input (SCK) plus Separate data input (SI) and data output (SO) lines. enter Control equipment through chip select (CS) enter. You can suspend communication with the device Hold the pin (HOLD). When the device hangs, The conversion of its input will be ignored, use Chip select exception allows hosting services High priority interrupt. 25LC256-I/ST adopts standard package, including 8-pin PDIP and SOIC, as well as advanced package. Including 8-pin DFN and 8-pin TSSOP.
2. Features
1. Max. Clock 10 MHz
2. Low-Power CMOS Technology:
- Max. Write Current: 5 mA at 5.5V, 10 MHz
- Read Current: 6 mA at 5.5V, 10 MHz
- Standby Current: 1 μA at 5.5V
3. 32,768 x 8-Bit Organization
4. 64-Byte Page
5. Self-Timed Erase and Write Cycles (5 ms max.)
6. Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
7. Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
8. Sequential Read
9. High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
10. Temperature Ranges Supported:
- Industrial (I): -40℃ to +85℃
- Extended (E): -40°C to +125°C
11. RoHS Compliant
12. Automotive AEC-Q100 Qualified
3. Package Types
4. Pin Function Table
5. PACKAGING INFORMATION
