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1. Describe
Freescale has introduced a version of the well-known MC68302 Integrated Multi-Protocol Processor (IMP) with Ethernet and DRAM controller. It is called the MC68EN302 and extends the family of devices based on the MC68302. The Ethernet controller has a 16-bit interface on the 68000 bus and provides full IEEE 802.3 compatibility. The programming model adopts the standard 68302 programming model. DRAM controller adopts MC68306 product. It is enhanced to support parity and external bus masters. The MC68EN302 is available in a low profile 144 TQFP package. The Ethernet controller consists of the Ethernet protocol core, transmit and receive FIFOs, and a 16-bit wide data/control interface connected to the 68000 bus. The Ethernet Protocol Core (EPC) provides compatibility with the IEEE 802.3 Ethernet standard. Transmit and receive FIFOs allow the EPC to automatically handle collisions and collision fragments, and they also provide bus latency that a DMA channel may encounter. Separate DMA channels are used for transmit and receive data paths. Dual-port RAM is used for on-chip buffer descriptors. The Buffer Descriptor Control (BDC) block updates buffer descriptors. The control status register is used to directly control all modules in the Ethernet controller.
2. Feature
1. Does not affect the performance of existing SCCs
2. 802.3 MAC layer support
3. Compatible with 68160 EEST (twisted pair/AUI)
4. Two dedicated Ethernet DMA channels, transmit and receive
5. Full duplex (switched) Ethernet support
6. Up to 10 Mb/s operating speed (20 Mb/s full duplex)
7. 128-byte FIFO for transmit and receive
8. No CPU or bus overhead on Rx or Tx frame collisions
9. 64-item CAM with hash option
10. 128 internal buffer descriptors
11. Execute framework functions
12. Full collision support
13. Receive back-to-back frames
14. Detection of overly long received frames
15. Multi-buffer data structures
16. Supports 48-bit addressing
17. Heartbeat indication
18. Transmitter network management and diagnostics
19. Receiver network management and diagnostics
20. Loopback mode for testing
21. Non-aggressive deferral options
22. Heartbeat status and interrupt options
23. Graceful stop command
3. Memory controller
1. Provides two CAS lines
2. Provides two RAS lines (supports two banks)
3. DRAM address multiplexing on standard address bus
4. Programmable up to three wait states
5. 100 nS DRAM for zero wait states at 20 MHz
6. 80 nS DRAM for zero wait states at 25 MHz
7. CAS before RAS refresh and refresh support during system reset
8. Programmable refresh and precharge cycles
9. RAS line separated from four chip selects
10. Access hidden refreshes from the bus
11. Write protection option
12. Programmable size of each bank from 128Kbytes to 8Mbytes
4. Application
The MC68EN302 is suitable for low-end bridge and router applications. it has three SCCs The MC68302, plus an additional Ethernet interface, has a total of four serial interfaces. Since the MC68EN302 has three SCCs as well as an Ethernet interface, it would be an excellent Choice of ISDN to Ethernet routers. For remote access dial-up, the MC68EN302 can be used with a dial-up modem that will connect to Ethernet LAN.