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1. Description
The Microchip Technology Inc. MCP6S21T-I/MS are analog Programmable Gain Amplifiers (PGA). They can be configured for gains from +1 V/V to +32 V/V and the input multiplexer can select one of up to eight channels through an SPI port. The serial interface can also put the PGA into shutdown to conserve power. These PGAs are optimized for high speed, low offset voltage and single-supply operation with rail-to-rail input and output capability. These specifications support single supply applications needing flexible performance or multiple inputs. The one channel MCP6S21 and the two channel MCP6S22 are available in 8-pin PDIP, SOIC and MSOP packages. The six channel MCP6S26 is available in 14-pin PDIP, SOIC and TSSOP packages. The eight channel MCP6S28 is available in 16-pin PDIP and SOIC packages. All parts are fully specified from -40°C to +85°C.
2. Features
1. Multiplexed Inputs: 1, 2, 6 or 8 channels
2. 8 Gain Selections: - +1, +2, +4, +5, +8, +10, +16 or +32 V/V
3. Serial Peripheral Interface (SPI)
4. Rail-to-Rail Input and Output
5. Low Gain Error: ±1% (max)
6. Low Offset: ±275 µV (max)
7. High Bandwidth: 2 to 12 MHz (typ)
8. Low Noise: 10 nV/√Hz @ 10 kHz (typ)
9. Low Supply Current: 1.0 mA (typ)
10. Single Supply: 2.5V to 5.5V
3. Typical Applications
1. A/D Converter Driver
2. Multiplexed Analog Applications
3. Data Acquisition
4. Industrial Instrumentation
5. Test Equipment
6. Medical Instrumentation
4. Pin configuration

5. Pin function

6. COMPONENT PLACEMENT
Separate circuit functions; digital from analog, low speed from high speed, and low power from high power, as this will reduce crosstalk. Keep sensitive traces short and straight, separating them from interfering components and traces. This is especially important for high frequency (low rise time) signals. Use a 0.1 µF supply bypass capacitor within 0.1 inch (2.5 mm) of the VDD pin. It must connect directly to the ground plane. A multi-layer ceramic chip capacitor, or high-frequency equivalent, works best.
7. SIGNAL COUPLING
The input pins of the MCP6S21T-I/MS family of operational amplifiers (op amps) are high-impedance. This makes them especially susceptible to capacitively-coupled noise. Using a ground plane helps reduce this problem. When noise is capacitively-coupled, the ground plane provides additional shunt capacitance to ground. When noise is magnetically coupled, the ground plane reduces the mutual inductance between traces. Increasing the separation between traces makes a significant difference. Changing the direction of one of the traces can also reduce magnetic coupling. It may help to locate guard traces next to the victim trace. They should be on both sides of the victim trace and be as close as possible. Connect the guard traces to the ground plane at both ends, and in the middle, of long traces.
8. HIGH FREQUENCY ISSUES
Because the MCP6S21/2/6/8 PGAs reach unity gain near 64 MHz when G = 16 and 32, it is important to use good PCB layout techniques. Any parasitic coupling at high frequency might cause undesired peaking. Filtering high frequency signals (i.e., fast edge rates) can help. To minimize high frequency problems:
1. Use complete ground and power planes
2. Use HF, surface mount components
3. Provide clean supply voltages and bypassing
4. Keep traces short and straight
5. Try a linear power supply (e.g., an LDO)
9. Capacitive Load and Stability
Large capacitive loads can cause both stability problems and reduced bandwidth for the MCP6S21T-I/MS family of PGAs . This happens because a large load capacitance decreases the internal amplifier’s phase margin and bandwidth. If the PGA drives a large capacitive load, the circuit in can be used. A small series resistor (RISO) at the VOUT improves the phase margin by making the load resistive at high frequencies. It will not, however, improve the bandwidth.