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1. Describe
The MM74HC4514 utilizes advanced silicon-gate CMOS technology and is ideal for memory address decoding or data routing applications. It has the high noise immunity and low power consumption typically associated with CMOS circuits, but is comparable in speed to low-power Schottky TTL circuits. It can drive up to 10 LS-TTL loads. The MM74HC4514 contains a 4 to 16 line decoder and a 4-bit latch. The latch can store data on the select input, thus allowing the selected output to remain high even if the select data has changed. When the LATCH ENABLE input of the latch is high, the output will vary with the input. When LATCH ENABLE goes low, the data on the select input is stored in the latch. This Four select inputs determine which output will go high if the INHIBIT input is low. If the INHIBIT input is high, all outputs are held low, disabling the decoder. The MM74HC4514 is functionally and pinout identical to the CD4514BC and MC1451BC. All inputs are protected from ESD diode damage from VCC and ground.
2. Feature
1. Typical propagation delay: 18 ns
2. Low static power consumption: 80 µA maximum
3. Low input current: 1 µA max
4. Fanout of 10 LS-TTL loads
3. Product description
