SN65HVD11DR

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1. Description

The SN65HVD10, SN75HVD10, SN65HVD11DR , SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers combine a 3-state differential line driver and differential input line receiver that operate with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, respectively, that can be externally connected together to function as direction control. Very low device standby supply current can be achieved by disabling the driver and the receiver. The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These parts feature wide positive and negative common-mode voltage ranges making them suitable for party-line applications.

2. Features

    1. Operates With a 3.3-V Supply

    2. Bus-Pin ESD Protection Exceeds 16-kV HBM

    3. 1/8 Unit-Load Option Available (Up to 256 Nodes on the Bus)

    4. Optional Driver Output Transition Times for Signaling Rates (1) of 1 Mbps, 10 Mbps, and 32 Mbps

    5. Meets or Exceeds the Requirements of ANSI TIA/EIA-485-A

    6. Bus-Pin Short-Circuit Protection From –7 V to 12 V

    7. Low-Current Standby Mode: 1 µA, Typical

    8. Open-Circuit, Idle-Bus, and Shorted-Bus Failsafe Receiver

    9. Thermal Shutdown Protection

  10. Glitch-Free Power-Up and Power-Down Protection for Hot-Plugging Applications

  11. SN75176 Footprint

3. Applications

    1. Digital Motor Control

    2. Utility Meters

    3. Chassis-to-Chassis Interconnects

    4. Electronic Security Stations

    5. Industrial Process Control

    6. Building Automation

    7. Point-of-Sale (POS) Terminals and Networks

4. Pin Configuration 

5. Pin Functions

6. Feature Description

Internal ESD protection circuits protect the transceiver bus terminals against ±16-kV Human Body Model (HBM) electrostatic discharges and ±4-kV electrical fast transients (EFT) according to IEC61000-4-4. The SN65HVD1x half-duplex family provides internal biasing of the receiver input thresholds for open-circuit, bus-idle, or short-circuit failsafe conditions, and a typical receiver hysteresis of 35 mV.

7. Device Functional Modes

When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as VOD = VA – VB is positive. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pulldown resistor to ground; thus, when left open, the driver is disabled (high-impedance) by default. The D pin has an internal pullup resistor to VCC; thus, when left open while the driver is enabled, output A turns high and B turns low. When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and lower than the negative input threshold, VIT– , the receiver output, R, turns low. If VID is between VIT+ and VIT– , the output is indeterminate. When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).

8. Application Information

The SN65HVD10, 'HVD11, and 'HVD12 are half-duplex RS-485 transceivers commonly used for asynchronous data transmissions. The driver and receiver enable pins allow for the configuration of different operating modes.