SN65HVD72DR

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1. Describe

These devices have powerful 3.3V drivers and The receiver uses a small package, suitable for demanding industries application. Bus pins are robust to ESD events High level of protection for mannequins And IEC contact discharge specification. Each of these devices incorporates a differential driver And a differential receiver from a single 3.3V power supply. Driver differential output Connect to the receiver differential input Internally forms a bus port suitable for half-duplex (Two-wire bus) communication. These devices have The wide common-mode voltage range allows Suitable for equipment for long-term multi-point applications The cable runs. The characteristics of these devices are –40°C to 125°C.

2. Feature

    1. Small size VSSOP package can save board space or SOIC for direct compatibility

    2. Bus I/O protection

        – >±15 kV HBM protection

        – >±12 kV IEC 61000-4-2 contact discharge

        – >±4 kV IEC 61000-4-4 fast transient burst

    3. Extend the industrial temperature range -40°C to 125°C

    4. Large receiver hysteresis (80 mV) for noise suppression

    5. Low unit load allows more than 200 connected nodes

    6. Low power consumption

        – Low standby supply current: <2 µA

        – ICC <1 mA at rest during operation

    7. 5V tolerance logic input compatible with 3.3V or 5V controller

    8. Optimized signaling rate options: 250 kbps, 20 Mbps, 50 Mbps

    9. Glitch-free power-on and power-off bus input and output

3. Application

    1. Factory automation

    2. Telecommunications infrastructure

    3. sport control

4. Pin configuration

5. Pin description

6. Feature Description

Internal ESD protection circuits protect the transceiver against electrostatic discharges (ESD) according to IEC 61000-4-2 of up to ±12 kV, and against electrical fast transients (EFT) according to IEC 61000-4-4 of up to ±4 kV. The SN65HVD7x half-duplex family provides internal biasing of the receiver input thresholds in combination with large input threshold hysteresis. At a positive input threshold of VIT+ = –20 mV and an input hysteresis of VHYS = 50 mV, the receiver output remains logic high under a bus-idle or bus-short condition even in the presence of 140-mVPP differential noise without the need for external failsafe biasing resistors. Device operation is specified over a wide ambient temperature range from –40°C to 125°C.

7. Device Functional Modes

When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as VOD = VA – VB is positive. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pulldown resistor to ground; thus, when left open, the driver is disabled (high-impedance) by default. The D pin has an internal pullup resistor to VCC; thus, when left open while the driver is enabled, output A turns high and B turns low. When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and lower than the negative input threshold, VIT– , the receiver output turns low. If VID is between VIT+ and VIT– , the output is indeterminate. When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).