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1. Describe
The'HCT138 device is designed for high-performance memory decoding or data routing applications that require extremely short propagation delay times. In high-performance storage systems, these decoders can minimize the impact of system decoding. When used with circuits that use fast-enabled high-speed memories, the delay time of these decoders and the enable time of the memory are generally less than the access time of a typical memory. This means that the effective system delay introduced by the decoder is negligible.
2. Feature
1. Operating Voltage Range of 4.5 V to 5.5 V
2. Outputs Can Drive Up To 10 LSTTL Loads
3. Low Power Consumption, 80-µA Max ICC
4. Typical tpd = 17 ns
5. ±4-mA Output Drive at 5 V
6. Low Input Current of 1 µA Max
7. Inputs Are TTL-Voltage Compatible
8. Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems
9. Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
3. Pin configuration
4. Package overview
