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1. Description
The TPS54327DDAR device is an adaptive on-time D CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP- CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.
2. Features
1. D-CAP2™ Mode Enables Fast Transient Response
2. Low-Output Ripple and Allows Ceramic Output
3. Wide VIN Input Voltage Range: 4.5 V to 18 V
4. Output Voltage Range: 0.76 V to 7 V
5. Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications
– 100 mΩ (High-Side) and 70 mΩ (Low-Side)
6. High Efficiency, Less Than 10 μA at shutdown
7. High Initial Bandgap Reference Accuracy
8. Adjustable Soft Start
9. Prebiased Soft Start
10. 700-kHz Switching Frequency (fSW)
11. Cycle-By-Cycle Overcurrent Limit
3. Applications
1. Wide Range of Applications for Low Voltage System
– Digital TV Power Supply
– High Definition Blu-ray Disc™ Players
– Networking Home Terminal
– Digital Set Top Box (STB)
4. Pin configuration
5. Pin description
6. Function description
At the beginning of each cycle, the high-side MOSFET is turned on. The MOSFET is turned off internally after the shooting timer expires. This time the converter input voltage VIN and output voltage VO are set to maintain a pseudo-fixed frequency within the input voltage range, so it is called adaptive on-time control. This is when the feedback voltage is lower than the reference voltage. An internal ramp is added to the reference voltage to simulate the output ripple, eliminating the ESR inductive output ripple needed for D-CAP2 mode control.
7. Electrical Characteristics
