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1. Description
74HC126D are high-speed CMOS QUAD BUS buffers manufactured with silicon gate C 2MOS technology. They achieve high-speed operation similar to equivalent LSTTL while maintaining low power consumption of CMOS. 74HC126D requires three-state control input Set G to high to put the output in a high impedance state The 74HC126D requires the control input to be set to a low level to place the output in a high impedance state. All inputs are equipped with protection circuits to prevent electrostatic discharge or transient overvoltage.
2. Features
1. High speed: tpd = 10 ns (typ.) at VCC = 6.0 V
2. Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 ℃
3. Balanced propagation delays: tPLH≈ tPHL
4. Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
3. Pin Assignment
4. Packaging
5. Package Dimensions
