C8051F527A-IMR

The C8051F527A-IMR of devices are fully integrated, low power, mixed-signal systemon-a-chip MCUs. Highlighted features are listed below. Refer to Table 1.1 for specific product feature selection.

    1. High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)

    2. In-system, full-speed, non-intrusive debug interface (on-chip)

    3. True 12-bit 200 ksps ADC with analog multiplexer and up to 16 analog inputs

    4. Precision programmable 24.5 MHz internal oscillator that is within ±0.5% across the temperature range and for VDD voltages greater than or equal to the on-chip voltage regulator minimum output at the low setting. The oscillator is within +1.0% for VDD voltages below this minimum output setting.

    5. Up to 7680 bytes of on-chip Flash memory

    6. 256 bytes of on-chip RAM

    7. Enhanced UART, and SPI serial interfaces implemented in hardware

    8. LIN 2.1 peripheral (fully backwards compatible, master and slave modes)

    9. Three general-purpose 16-bit timers

  10. Programmable Counter/Timer Array (PCA) with three capture/compare modules and Watchdog Timer function

  11. On-chip Power-On Reset, VDD Monitor, and Temperature Sensor

  12. On-chip Voltage Comparator

  13. Up to 16 Port I/O

With on-chip Power-On Reset, VDD monitor, Watchdog Timer, and clock oscillator, the C8051F527A-IMR devices are truly standalone system-on-a-chip solutions. The Flash memory is byte writable and can be reprogrammed in-circuit, providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User software has complete control of all peripherals, and may individually shut down any or all peripherals for power savings.

The on-chip Silicon Laboratories 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory and registers, setting breakpoints, single stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging using C2. The two C2 interface pins can be shared with user functions, allowing in-system programming and debugging without occupying package pins. Each device is specified for 2.0 to 5.25 V operation (supply voltage can be up to 5.25 V using on-chip regulator) over the automotive temperature range (–40 to +125 °C). The F52x/F52xA is available in the DFN10 (3 x 3 mm) package. The F53x/F53xA is available in the QFN20 (4 x 4 mm) or the TSSOP20 package.

On-Chip Debug

    1. On-chip debug circuitry facilitates full-speed, nonintrusive in-system debug (No emulator required)

    2. Provides breakpoints, single stepping

    3. Inspect/modify memory and registers

    4. Complete development kit Supply Voltage 2.0 to 5.25 V

    5. Built-in LDO regulator High-Speed 8051 µC Core

    6. Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks

    7. Up to 25 MIPS throughput with 25 MHz system clock

    8. Expanded interrupt handler

Memory

    1. 8/4/2 kB Flash; In-system byte programmable in 512 byte sectors

    2. 256 bytes internal data RAM

Digital Peripherals

    1. 16/6 port I/O; push-pull or open-drain, 5 V tolerant

    2. Hardware SPI™, and UART serial port

    3. LIN 2.1 Controller (Master and Slave capable); no crystal required

    4. Three general purpose 16-bit counter/timers

    5. Programmable 16-bit counter/timer array with three capture/compare modules, WDT

Clock Sources

    1. Internal oscillators: 24.5 MHz ±0.5% accuracy supports UART and LIN-Master operation

    2. External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)

    3. Can switch between clock sources on-the-fly

Packages

    1. 10-Pin DFN (3 x 3 mm)

    2. 20-pin QFN (4 x 4 mm)

    3. 20-pin TSSOP

Automotive Qualified

    1. Temperature Range: –40 to +125 °C

    2. Compliant to AEC-Q100

Pinout and Package Definitions