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1. Description
The P-channel enhancement mode field effect transistor is produced using ON Semiconductor’s proprietary advanced battery Density, DMOS technology. This very high density process is Designed to minimize on-resistance during low gate drive To adapt. The device is designed for applications In battery power applications such as laptops And cell phone. The device has an excellent turn-on state High resistance can be maintained even at gate drive voltages as low as 2.5 volts.
2. Features
1. -25 V, -0.46 A continuous, -1.5 A Peak.
RDS(ON) = 1.1 W @ VGS = -4.5 V
RDS(ON) = 1.5 W @ VGS= -2.7 V.
2. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V.
3. Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
4. Compact industry standard SOT-23 surface mount package.
3. Package Demensions
