R5F100FGAFP#V0

True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz

Ultra-low power consumption technology

   1. VDD = single power supply voltage of 1.6 to 5.5 V

   2. HALT mode

   3. STOP mode

   4. SNOOZE mode

RL78 CPU core

   1. CISC architecture with 3-stage pipeline

   2. Minimum instruction execution time: Can be changed from high speed (0.03125 μs: @ 32 MHz operation with high-speed on-chip oscillator) to ultra-low speed

    (30.5 μs: @ 32.768 kHz operation with subsystemclock)

   3. Address space: 1 MB

   4. General-purpose registers: (8-bit register × 8) × 4 banks

   5. On-chip RAM: 2 to 32 KB

Code flash memory

   1. Code flash memory: 16 to 512 KB

   2. Block size: 1 KB

   3. Prohibition of block erase and rewriting (security function)

   4. On-chip debug function

   5. Self-programming (with boot swap function/flash shield window function)

Data Flash Memory

   1. Data flash memory: 4 KB to 8 KB

   2. Back ground operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory.

   3. Number of rewrites: 1,000,000 times (TYP.)

   4. Voltage of rewrites: VDD = 1.8 to 5.5 V

High-speed on-chip oscillator

   1. Select from 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz,6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz

   2. High accuracy: +/- 1.0 % (VDD = 1.8 to 5.5 V, TA = -20 to +85°C)

Operating ambient temperature

   1. TA = -40 to +85°C (A: Consumer applications, D: Industrial applications )

   2. TA = -40 to +105°C (G: Industrial applications)

Power management and reset function

   1. On-chip power-on-reset (POR) circuit

   2. On-chip voltage detector (LVD) (Select interrupt and reset from 14 levels) 

DMA (Direct Memory Access) controller

   1. 2/4 channels

   2. Number of clocks during transfer between 8/16-bit SFR and internal RAM: 2 clocks

Serial interface

   1. CSI: 2 to 8 channels

   2. UART/UART (LIN-bus supported): 2 to 4 channels

   3. I2C/Simplified I2C communication: 3 to 10 channels

Timer

   1. 16-bit timer: 8 to 16 channels

   2. 12-bit interval timer: 1 channel

   3. Real-time clock: 1 channel (calendar for 99 years,alarm function, and clock correction function)

   4. Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)

A/D converter

   1. 8/10-bit resolution A/D converter (VDD = 1.6 to 5.5 V)

   2. Analog input: 6 to 26 channels

   3. Internal reference voltage (1.45 V) and temperature sensor Note 1

I/O port

   1. I/O port: 16 to 120 (N-ch open drain I/O [withstand voltage of 6 V]: 0 to 4, N-ch open drain I/O [VDD withstand voltage Note 2/EVDD withstand voltage Note 3]: 5 to 25)

   2. Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor

   3. Different potential interface: Can connect to a 1.8/2.5/3 V device

   4. On-chip key interrupt function

   5. On-chip clock output/buzzer output controller

Others

   1. On-chip BCD (binary-coded decimal) correction circuit